Authors: jon stokes
Tags: #Computers, #Systems Architecture, #General, #Microprocessors
fetch stages, on Pentium 4, 155
on Pentium III, 260
next instruction pointer stages,
vector floating-point unit,
on Pentium 4, 155
on G4e, 173
INDEX
291
vector issue queue (VIQ),
write-back stage
for G4e, 146
for G4e, 147
vector logical issue queues, 207
in Pentium pipeline, 84–85
vector permute unit (VPU), 135
write phase of instruction, 37
on G4e, 173
write policies, for caches, 232–233
issue queue for, 211,
212
write-through, 232–233
vectors, vs. scalars, 66,
170
vector simple integer unit,
X
on G4e, 173
vector unit, on G4, 135
x
86 computers
very long instruction word (VLIW)
critical execution path,
151
ISA, 180
drawbacks and benefits, 179
V integer pipe, 87
ISA, 73, 74
VIQ (vector issue queue),
vs. PowerPC ISA, 103–105
for G4e, 146
vs. PowerPC, 136
virtual address space, vs. physical,
registers for, 7
185–186
x
86 instructions
Virtualization Technology
cost of legacy support, 107, 136
(VT-x), 253
decoding in P6 pipeline, 101
Virtual Machine Extensions (VMX),
and IA-64 processors, 180
70, 135, 253
limitations, 84
virtual machine monitor
overhead on Pentium, 91–92
(VMM), 253
trace cache handling of
virtual processor, 253
multi-cycle, 154
VLIW (very long instruction word)
x
86-64, 187–192
ISA, 180
extensions, 180
VMM (virtual machine
Hammer virtual address
monitor), 253
size in, 186
VMX (Virtual Machine Extensions),
programming model,
189
70, 135, 253
switching modes, 189–192
von Neumann, John, 6
n
x
87 computers
VPU.
See
vector permute unit (VPU)
floating-point extensions, 70, 167
VT-x (Virtualization
floating-point registers as stack, 89
Technology), 253
pushing and popping data on
register stack,
90
W
register file, 88
Xeon, 165, 235
Wilkes, Maurice, 6
n
XMM registers, 175
Willamette, 138, 236
wires, 1
Y
Woodcrest, 255
working set, 222
Yonah, 236, 247
write-back, for cache, 233
292
INDEX
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